1. Field of Invention
The invention relates to a bias generator and, in particular, to a bias generator that automatically adjusts its slew rate.
2. Related Art
A unit gain buffer in the prior art shown in FIG. 1 includes an amplifier and a feedback circuit. The amplifier has a positive input end, a negative input end, and an output end. The positive input end is coupled to an input voltage Vin, the negative input end is coupled to the output end to obtain an output voltage Vout.
FIG. 2 shows the comparison between the input voltage and the output voltage of the unit gain buffer in the prior art. Its gain is one, meaning that the output voltage is equal to the input voltage theoretically. In practice, the input voltage is a step voltage. The uprising slope of the output voltage is not infinite. Therefore, it takes certain time T1 to reach a stable ratio. This period of time T1 is called the slew time. After the conversion stage, the increase of the output voltage becomes less significant. It takes some time T2 to settle. This period of time is called the settling time.
The slew rate SR is the uprising slope of the output voltage Vout with respect to time during the slew time. The slew rate SR is obtained by taking the derivative of the output voltage Vout with respect to time:SR=dVout/dt.
To perform sampling and holding actions, the pipeline analog analog-to-digital converter (ADC) has to wait for the slew time and the settling time before obtaining a fixed voltage.
FIG. 3 shows a conventional differential amplifier and its input voltage and output voltage. The input voltage Vin of the differential amplifier is a step voltage. When the input voltage Vin is small, the output voltage Vout changes with the step height of the input voltage. If the input voltage Vin becomes too large, the control switch M2 of the differential amplifier shuts down. The output voltage Vout depends only on a tail current Iss and a load capacitance CL:SR=Iss/CL.
Since the differential amplifier in the prior art has a fixed slew rate, there often are problems in over designs and power waste.
Take a differential amplifier operating between 20 MHz and 60MHz as an example. One often uses the highest frequency 60 MHz to design the optimal value of the slew rate. For low-frequency signals of 20 MHz or 40 MHz, the high slew rate cannot increase the reaction efficiency and simply wastes power.